// The user must define CLA_C in the project linker settings if using the // CLA C compiler // Project Properties -> C2000 Linker -> Advanced Options -> Command File // Preprocessing -> --define #ifdef CLA_C -heap 0x100 -stack 0x100 _Cla1Prog_Start = _Cla1funcsRunStart; // Define a size for the CLA scratchpad area that will be used // by the CLA compiler for local symbols and temps // Also force references to the special symbols that mark the // scratchpad are. //CLA_SCRATCHPAD_SIZE = 0x100; --undef_sym=__cla_scratchpad_end --undef_sym=__cla_scratchpad_start #endif //CLA_C /* @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ */ MEMORY { PAGE 0 : /* Program Memory */ /* Memory (RAM/FLASH) blocks can be moved to PAGE1 for data allocation */ /* BEGIN is used for the "boot to Flash" bootloader mode */ BEGIN : origin = 0x080000, length = 0x000002 RAMM0 : origin = 0x000122, length = 0x0002DE RAMD0 : origin = 0x00B000, length = 0x000800 /* RAMLS0 : origin = 0x008000, length = 0x000800 */ /* RAMLS1 : origin = 0x008800, length = 0x000800 */ RAMLS2 : origin = 0x009000, length = 0x001000 /* CPU RAM PRG */ // RAMLS3 : origin = 0x009800, length = 0x000800 RAMLS4 : origin = 0x00A000, length = 0x000800 /* Don't used */ RAMLS5 : origin = 0x00A800, length = 0x000800 /* Don't used */ RAMGS0 : origin = 0x00C000, length = 0x002000 /* CPU RAm PRG */ /* Flash sectors */ FLASHA : origin = 0x080002, length = 0x001FFE /* on-chip Flash */ FLASHB : origin = 0x082000, length = 0x002000 /* on-chip Flash */ FLASHC : origin = 0x084000, length = 0x002000 /* on-chip Flash */ FLASHD : origin = 0x086000, length = 0x002000 /* on-chip Flash */ FLASHE : origin = 0x088000, length = 0x008000 /* on-chip Flash */ FLASHF : origin = 0x090000, length = 0x008000 /* on-chip Flash */ FLASHG : origin = 0x098000, length = 0x008000 /* on-chip Flash */ // FLASHH : origin = 0x0A0000, length = 0x008000 /* on-chip Flash */ FLASHI : origin = 0x0A8000, length = 0x008000 /* on-chip Flash */ FLASHJ : origin = 0x0B0000, length = 0x008000 /* on-chip Flash */ FLASHK : origin = 0x0B8000, length = 0x002000 /* on-chip Flash */ FLASHL : origin = 0x0BA000, length = 0x002000 /* on-chip Flash */ FLASHM : origin = 0x0BC000, length = 0x002000 /* on-chip Flash */ FLASHN : origin = 0x0BE000, length = 0x002000 /* on-chip Flash */ FPUTABLES : origin = 0x3FD860, length = 0x0006A0 /* FPU Tables in Boot ROM */ IQTABLES : origin = 0x3FDF00, length = 0x000B50 /* IQ Math Tables in Boot ROM */ IQTABLES2 : origin = 0x3FEA50, length = 0x00008C /* IQ Math Tables in Boot ROM */ IQTABLES3 : origin = 0x3FEADC, length = 0x0000AA /* IQ Math Tables in Boot ROM */ ROM : origin = 0x3FF3B0, length = 0x000C10 /* Boot ROM */ RESET : origin = 0x3FFFC0, length = 0x000002 /* part of boot ROM */ VECTORS : origin = 0x3FFFC2, length = 0x00003E /* part of boot ROM */ PAGE 1 : /* Data Memory */ /* Memory (RAM/FLASH) blocks can be moved to PAGE0 for program allocation */ BOOT_RSVD : origin = 0x000002, length = 0x000120 /* Part of M0, BOOT rom will use this for stack */ RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */ RAMD1 : origin = 0x00B800, length = 0x000800 CLA1_MSGRAMLOW : origin = 0x001480, length = 0x000080 CLA1_MSGRAMHIGH : origin = 0x001500, length = 0x000080 CLARAM0 : origin = 0x008800, length = 0x000400 CLARAM1 : origin = 0x008C00, length = 0x000400 CLARAM2 : origin = 0x008000, length = 0x000800 // RAMGS0 : origin = 0x00C000, length = 0x002000 // RAMGS1 : origin = 0x00D000, length = 0x001000 RAMGS2 : origin = 0x00E000, length = 0x001000 /* stack ari */ RAMGS3 : origin = 0x00F000, length = 0x001000 RAMGS4 : origin = 0x010000, length = 0x003800 // RAMGS5 : origin = 0x011000, length = 0x001000 // RAMGS6 : origin = 0x012000, length = 0x001000 RAMGS7 : origin = 0x013800, length = 0x000800 FLASHH : origin = 0x0A0000, length = 0x008000 /* on-chip Flash */ } SECTIONS { /* Allocate program areas: */ .cinit : > FLASHA PAGE = 0, ALIGN(4) SIZE(_CinitSize) .pinit : > FLASHA, PAGE = 0, ALIGN(4) .text : >> FLASHB | FLASHC | FLASHD | FLASHE PAGE = 0, ALIGN(4) codestart : > BEGIN PAGE = 0, ALIGN(4) .TI.ramfunc : LOAD = FLASHN, RUN = RAMGS0, /*|RAMLS3 |RAMLS4, */ LOAD_START(_RamfuncsLoadStart), LOAD_SIZE(_RamfuncsLoadSize), LOAD_END(_RamfuncsLoadEnd), RUN_START(_RamfuncsRunStart), RUN_SIZE(_RamfuncsRunSize), RUN_END(_RamfuncsRunEnd), PAGE = 0, ALIGN(4) /* Allocate uninitalized data sections: */ .stack : > RAMGS2 | RAMGS3 PAGE = 1 .ebss : RUN = RAMGS4 , PAGE = 1, RUN_START(_RamEBssStart), RUN_SIZE(_RamEBssSize) .esysmem : > RAMGS7 PAGE = 1 // DMARAML1 : > RAMGS1, PAGE = 1 // DMARAML7 : > RAMGS6, PAGE = 1 // DMARAML8 : > RAMGS7, PAGE = 1 Cla1ToCpuMsgRAM : > CLA1_MSGRAMLOW, PAGE = 1 CpuToCla1MsgRAM : > CLA1_MSGRAMHIGH, PAGE = 1 Cla1DataRam0 : > CLARAM0, PAGE = 1 Cla1DataRam1 : > CLARAM1, PAGE = 1 Cla1DataRam2 : > CLARAM2, PAGE = 1 FPUmathTables : > FPUTABLES, PAGE = 0, TYPE = NOLOAD .scratchpad : > CLARAM2, PAGE = 1 .bss_cla : > CLARAM2, PAGE = 1 Cla1Prog : LOAD = FLASHG, RUN = RAMLS2 , /*| RAMLS3, */ LOAD_START(_Cla1funcsLoadStart), LOAD_END(_Cla1funcsLoadEnd), LOAD_SIZE(_Cla1funcsLoadSize), RUN_START(_Cla1funcsRunStart), PAGE = 0, ALIGN(4) .const_cla : LOAD = FLASHH, RUN = CLARAM2, LOAD_START(_Cla1ConstLoadStart), LOAD_END(_Cla1ConstLoadEnd), LOAD_SIZE(_Cla1ConstLoadSize), RUN_START(_Cla1ConstRunStart), PAGE = 1 /* Initalized sections go in Flash */ // .econst : >> FLASHF | FLASHG | FLASHH PAGE = 0, ALIGN(4) .econst : >> FLASHF PAGE = 0, ALIGN(4) .switch : > FLASHB PAGE = 0, ALIGN(4) .reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */ } /* //=========================================================================== // End of file. //=========================================================================== */